The present invention relates in general to a method of transporting a semiconductor device, during the manufacture of the a semiconductor device, and, more particularly, the invention relates to a technique for transporting a semiconductor device using a tray.
In the manufacture or shipping of a semiconductor device, as a method of transporting semiconductor chips (including a CSP (Chip Size Package), which have been cut out from a semiconductor wafer, to a given site, a method has been employed in which a plurality of semiconductor chips are transported in a state wherein the semiconductor chips are carried in a plate-like container, which is commonly referred to as a “tray”.
In transporting the semiconductor chips, a plurality of trays having the same constitution are stacked in multiple stages to form a set, and several sets of the trays of semiconductor chips are accommodated in an exclusive-use vinyl bag and are conveyed in that state. On a main surface and a back surface of each tray, a plurality of accommodating portions having a recessed cross section for accommodating the semiconductor chips are formed. By stacking the trays, spaces are formed where the accommodating portions formed over the main surface of the lower-stage tray and the accommodating portions formed over the back surface of the upper-stage (lid side) tray are overlap each other, and the semiconductor chips can be accommodated in these spaces.
However, in the above-mentioned method of transporting semiconductor chips using trays, there exists a drawback in that the semiconductor chip tends to adhere to the back surface of the upper-stage tray due to the action of static electricity at the time of transporting the semiconductor chips. Once a semiconductor chip adheres to the back surface of the upper-stage tray, when the upper-stage tray is removed to take out the semiconductor chips from the tray or to inspect the appearance or the like of the semiconductor chips, the semiconductor chip which has adhered to the upper-stage tray is not present in the accommodating portion of the lower-stage tray where the semiconductor chip should be accommodated, thus giving rise to a drawback in that the semiconductor chip cannot be taken out or cannot be inspected. Accordingly, as a countermeasure to prevent the adhesion of a semiconductor chip to an upper-stage tray, a dull (rough surface) finish treatment is applied to the accommodating portions of the back surface of the upper-stage tray.
A method of transporting semiconductor chips using trays is described in Japanese Unexamined Patent Publication 2002-110778 (patent literature 1), for example. This patent literature 1 discloses a technique in which, to prevent the semiconductor chips from being scattered or damaged during transportation, projections are formed over a lid-side tray, and the semiconductor chips are transported in a state in which the semiconductor chips are pushed by these projections.
Further, Japanese Unexamined Patent Publication 2002-2871 (patent literature 2), for example, discloses a constitution in which, to prevent CSPs on which bump electrodes are formed from being broken or ruptured during the transportation thereof, buffer portions, which are formed of a material softer than a tray, are formed over CSP accommodating portions of the tray. This patent literature 2 also discloses a constitution in which projections are formed over a surface side of the buffer portion which faces the CSP, and the CSP is supported by these projections.